AVR481
2.6.1 Headers on 100mil grid
All communication pin headers and IO connections along the edge of the board are
placed on a 100-mil grid to make it easy to implement a motherboard layout that the
DB101 fits onto. The header/connection coordinates can be determined from Figure
2-5, which shows the 100 mil grid over the DB101 layout.
Figure 2-5. DB101 layout and 100 mil grid – front view.
2.6.2 UART
The mega1281 UART1 is connected to pin header J204, which can be found on the
lower right-hand side on Figure 2-4. The level converted RxD and TxD lines are
available on the header – the pins are marked with silkscreen labels RXL and TXL.
The RS232 converted RxD and TxD signals are available on the same header, where
the pins are marked with silkscreen labels RXH and TXH. Please refer to Figure 2-1.
The RS232 driver circuit uses the RS232 RxD line voltage to generate the correct
TxD levels. Therefore, when using the RS232 driver the UART is half duplex only.
2.6.3 SPI
The level converted SPI lines are available on pin header J200, which can be found
on the upper right-hand side on Figure 2-4.
2.6.4 TWI
The level converted TWI lines are available on J203, which can be found on the
middle left-hand side on Figure 2-4.
2.7 Dataflash?
An Atmel AT45DB161D dataflash is available on the DB101. This can be used to
store display fonts, graphics, sound and other data, which will be persistent
regardless of reprogramming the mega1281 internal flash memory.
5
8073B-AVR-09/07
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